HTRB, HTGB and H3TRB Test Systems for Power Semiconductors
Verify junction integrity and oxide reliability under extreme conditions
Overview
HTRB, HTGB, and H3TRB tests are among the most critical reliability tests in power semiconductor qualification. The three tests are complementary — each targets a different device area. Running only one means testing only one-third of potential failure mechanisms.
HTRB — Junction Integrity Under High Voltage
High Temperature Reverse Bias stresses devices with reverse voltage (80–100% VRRM) at 150–175 °C for 1,000 hours. The test accelerates thermally activated degradation following the Arrhenius model and reveals:
- Ion migration — mobile ions (Na⁺, K⁺) drift through the oxide under the electric field, altering surface charge
- Crystal defects and dislocations — lead to increased leakage current under high-temperature reverse voltage
- Edge termination degradation — defects in guard rings, JTE and field plates at the chip edge
- Passivation aging — under combined stress of high temperature and high electric field
For SiC devices, leakage current may initially increase before stabilizing — a phenomenon not seen in silicon. AQG 324 therefore recommends trend analysis instead of fixed thresholds.
HTGB — The Most Critical Test for SiC
High Temperature Gate Bias applies maximum gate voltage at 150–175 °C and tests:
- Gate oxide integrity — can the oxide withstand sustained field stress?
- Threshold voltage drift (ΔVth) — does the turn-on threshold shift?
- Charge trapping — do charges accumulate at the oxide-semiconductor interface?
- Time-dependent dielectric breakdown (TDDB) — when does the oxide fail?
For SiC MOSFETs, HTGB is particularly critical: the SiC/SiO₂ interface has 100 to 1,000x higher defect density than Si/SiO₂. Carbon atoms from the substrate create electron traps that capture charge carriers and shift threshold voltage. A SiC MOSFET with Vth = 3.5 V at room temperature may turn on at 2.0 V or 5.0 V after 1,000 h HTGB — too low means false turn-on and shoot-through, too high means increased on-resistance.
HTGB must be performed in both polarities: positive bias drives electron trapping, negative bias drives hole trapping. Testing only one polarity reveals only half the truth.
H3TRB — When Moisture Becomes a Weapon
High Humidity High Temperature Reverse Bias combines reverse voltage with 85 °C and 85% R.H. for 1,000 hours. The combination of temperature, humidity and electric field drives electrochemical corrosion inside the device:
- Dendrite growth — metallic whiskers grow under moisture and electric field between conductors, creating short circuits. Without warning, without parameter drift.
- Electrochemical migration — metal ions (Ag, Cu) migrate along surfaces
- Passivation integrity — cracks or pores allow moisture to reach the chip
H3TRB is not just a package test: especially for SiC where passivation layers are typically thinner, the combination of moisture and high reverse voltage can also attack the chip surface. Since the AEC-Q101 revision of 2024, actual rated voltage applies instead of the old 100 V limit.
DHTRB — Dynamic Testing for SiC and GaN
Dynamic Reverse Bias — mandatory for automotive SiC modules since AQG 324 Release 04.1/2025. A SiC MOSFET in a traction inverter switches 100,000 to 500,000 times per second. Throughout the entire static HTRB test, the device never switches once.
DHTRB replaces static DC voltage with pulsed voltage profiles up to 500 kHz with adjustable duty cycle (25–75%). Dynamic switching creates four stress types that a static test misses entirely:
- Magnetic field-induced bond forces — steep di/dt transients exert mechanical forces on bond wires
- Dielectric fatigue — repeated voltage transitions cause trap formation at the gate oxide
- Accelerated electromigration — dynamic profiles drive migration at material interfaces
- Localized self-heating — switching transients create thermomechanical micro-cycles
Standards
- JEDEC JESD22-A108 — worldwide reference standard for HTRB
- IEC 60749-23 — international standard for high-temperature reverse bias tests
- AQG 324 (ECPE) — mandatory for automotive power modules: HTRB (QL-05), HTGB (QL-06), H3TRB (QL-07) plus dynamic variants (DHTRB, DGS, dynamic H3TRB) for SiC
- AEC-Q101 — automotive qualification for discrete semiconductors
- MIL-STD-750 — requirements for aerospace and defense
The HTRB 689 by Schuster Elektronik
- Test voltage up to ±2,000 V (Si, SiC, GaN)
- 18 single specimens or 9 half-bridge modules per station
- Bias current measurement up to 300 mA per channel
- Temperature measurement up to 200 °C directly at the DUT baseplate
- Modular expansion to more than 10 stations
- Three operating modes for voltage generation (different ripple modes)
- Automatic limit monitoring with immediate shutdown
- Independent gate voltage sources per channel for combined HTRB/HTGB tests
- Network interface for remote monitoring and data export
Our HTRB Test Systems
Frequently Asked Questions
01 What failure mechanisms does an HTRB test reveal and why is it indispensable for qualification?
The HTRB test (High Temperature Reverse Bias) stresses power semiconductors with reverse voltage (typically 80-100% of VRRM) at maximum junction temperature (150-175°C) for typically 1,000 hours. It accelerates thermally activated degradation following the Arrhenius model and reveals the following weaknesses:
- Junction integrity: Crystal defects and dislocations in the semiconductor material that lead to increased leakage current under high-temperature reverse voltage
- Ionic contamination: Mobile ions (Na⁺, K⁺) on the chip surface or from the package that migrate toward the junction under the electric field and degrade blocking capability
- Edge termination weaknesses: Defects in field depletion structures (guard rings, JTE, field plates) at the chip edge that manifest as local leakage current paths
- Passivation degradation: Aging of surface passivation under combined stress of high temperature and high electric field
The reverse current (IR) is continuously monitored -- stable leakage current over the entire test duration is the prerequisite for passing.
02 What is the technical difference between HTRB, HTGB and H3TRB and which device areas does each test examine?
| HTRB | HTGB | H3TRB | |
|---|---|---|---|
| Stress | Reverse voltage VCE/VDS (80-100% VRRM) | Gate voltage VGS (max. specified) | Reverse voltage VCE/VDS |
| Temperature | 150-175°C (Tj,max) | 150-175°C (Tj,max) | 85°C |
| Humidity | No | No | 85% R.H. |
| Tests | Junction, edge termination, passivation | Gate oxide, threshold voltage stability | Moisture resistance, package sealing |
| Parameter | Leakage current IR / IDSS | Gate leakage IGSS, Vth drift | Leakage current IR |
| Duration | 1,000 h (AQG 324: QL-05) | 1,000 h (AQG 324: QL-06) | 1,000 h (AQG 324: QL-07) |
| Standard | JEDEC JESD22-A108, IEC 60749-23 | IEC 60749-5 | JEDEC JESD22-A101 |
For HTGB, source and drain are shorted and the maximum specified gate voltage is applied. Marginal gate oxides show an increase in gate leakage current or threshold voltage drift due to charge trapping at the oxide-semiconductor interface under this stress.
For H3TRB, the temperature at 85°C is significantly lower, but humidity is added as an additional stress factor. Water can reach the chip through micro-cracks in the passivation or through package leaks and trigger electrochemical corrosion.
03 What special challenges do SiC devices pose for HTRB and HTGB tests?
SiC power semiconductors (silicon carbide) fundamentally differ from silicon IGBTs in several aspects:
- Gate oxide sensitivity: The SiC/SiO₂ interface has a lower barrier height than Si/SiO₂. This promotes Fowler-Nordheim tunneling of electrons into the oxide, leading to charge trapping and threshold voltage drift. HTGB tests are therefore particularly critical for SiC MOSFETs.
- Basal plane dislocations (BPD): During current flow through the body diode, electron-hole recombination at basal plane dislocations can lead to stacking fault expansion -- a SiC-specific phenomenon that does not occur in silicon.
- Higher electric field strengths: The wider bandgap of SiC (3.26 eV vs. 1.12 eV for Si) enables higher blocking voltages but also means higher local field strengths that can accelerate subtle degradation effects at the edge termination.
- Measurement requirements: The very low leakage currents of SiC devices require higher measurement resolution and longer settling times for stable readings.
04 How is the HTRB 689 from Schuster Elektronik designed and how does it differ from competitor products?
The HTRB 689 is based on a modular station concept: The base system consists of a base station with reverse voltage generator, measurement unit and control, plus a PC. It can be expanded to more than 10 stations, with each station independently configurable and controllable.
Key differentiating features:
- ±2,000 V test voltage -- symmetrical positive and negative, suitable for bidirectional tests
- 18 individual specimens or 9 half-bridge modules per station on three heating/cooling plates
- Three operating modes for voltage generation: Half-wave 50 Hz (single-wave rectification), half-wave 100 Hz (bridge rectification) and smoothed half-wave 100 Hz -- different ripple modes for different test requirements
- Effective sampling rate 50 Hz / 13 samples (260 ms measurement cycle): Each cycle captures individual leakage currents, total current and voltage
- Temperature measurement directly at the DUT baseplate via dedicated sensors (not ambient temperature)
- Automatic limit monitoring with immediate shutdown on exceedance -- protects DUT and system
- Network interface for remote monitoring and data export -- indispensable for 1,000-hour tests
Inquiry about HTRB, HTGB, H3TRB
Interested in products or updates in the field of HTRB, HTGB, H3TRB? Contact us — we're happy to advise you.